3df6cc9de6
For GICD and GICR a SOC needs to implement 2 callbacks to get the base of those interrupt controllers. For all the cpu GIC the code loops over all the DEVICE_PATH_GICC_V3 devices in a similar fashion to how x86 lapics are added. It's up to the SOC to add those devices to the tree. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I5074d0a76316e854b7801e14b3241f88e805b02f Reviewed-on: https://review.coreboot.org/c/coreboot/+/76132 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
158 lines
2.7 KiB
C
158 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef DEVICE_PATH_H
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#define DEVICE_PATH_H
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#include <stdint.h>
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enum device_path_type {
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DEVICE_PATH_NONE = 0,
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DEVICE_PATH_ROOT,
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DEVICE_PATH_PCI,
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DEVICE_PATH_PNP,
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DEVICE_PATH_I2C,
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DEVICE_PATH_APIC,
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DEVICE_PATH_DOMAIN,
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DEVICE_PATH_CPU_CLUSTER,
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DEVICE_PATH_CPU,
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DEVICE_PATH_CPU_BUS,
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DEVICE_PATH_IOAPIC,
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DEVICE_PATH_GENERIC,
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DEVICE_PATH_SPI,
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DEVICE_PATH_USB,
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DEVICE_PATH_MMIO,
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DEVICE_PATH_GPIO,
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DEVICE_PATH_MDIO,
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DEVICE_PATH_GICC_V3,
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/*
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* When adding path types to this table, please also update the
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* DEVICE_PATH_NAMES macro below.
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*/
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};
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#define DEVICE_PATH_NAMES { \
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"DEVICE_PATH_NONE", \
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"DEVICE_PATH_ROOT", \
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"DEVICE_PATH_PCI", \
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"DEVICE_PATH_PNP", \
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"DEVICE_PATH_I2C", \
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"DEVICE_PATH_APIC", \
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"DEVICE_PATH_DOMAIN", \
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"DEVICE_PATH_CPU_CLUSTER", \
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"DEVICE_PATH_CPU", \
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"DEVICE_PATH_CPU_BUS", \
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"DEVICE_PATH_IOAPIC", \
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"DEVICE_PATH_GENERIC", \
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"DEVICE_PATH_SPI", \
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"DEVICE_PATH_USB", \
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"DEVICE_PATH_MMIO", \
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"DEVICE_PATH_GPIO", \
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"DEVICE_PATH_MDIO", \
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"DEVICE_PATH_GICC_V3", \
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}
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struct domain_path {
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unsigned int domain;
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};
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struct pci_path {
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unsigned int devfn;
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};
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struct pnp_path {
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unsigned int port;
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unsigned int device;
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};
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struct i2c_path {
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unsigned int device;
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unsigned int mode_10bit;
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};
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struct spi_path {
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unsigned int cs;
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};
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struct apic_path {
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unsigned int initial_lapicid;
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unsigned int apic_id;
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unsigned int package_id;
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unsigned int node_id;
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unsigned int core_id;
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unsigned int thread_id;
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unsigned char core_type;
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};
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struct ioapic_path {
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unsigned int ioapic_id;
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};
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struct cpu_cluster_path {
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unsigned int cluster;
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};
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struct cpu_path {
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unsigned int id;
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};
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struct cpu_bus_path {
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unsigned int id;
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};
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struct generic_path {
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unsigned int id;
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unsigned int subid;
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};
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struct usb_path {
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unsigned int port_type;
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unsigned int port_id;
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};
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struct mmio_path {
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uintptr_t addr;
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};
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struct gpio_path {
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unsigned int id;
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};
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struct mdio_path {
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unsigned int addr;
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};
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struct gicc_v3_path {
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unsigned long long mpidr;
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unsigned int vgic_mi;
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unsigned int pi_gsiv;
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};
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struct device_path {
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enum device_path_type type;
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union {
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struct pci_path pci;
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struct pnp_path pnp;
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struct i2c_path i2c;
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struct apic_path apic;
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struct ioapic_path ioapic;
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struct domain_path domain;
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struct cpu_cluster_path cpu_cluster;
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struct cpu_path cpu;
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struct cpu_bus_path cpu_bus;
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struct generic_path generic;
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struct spi_path spi;
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struct usb_path usb;
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struct mmio_path mmio;
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struct gpio_path gpio;
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struct mdio_path mdio;
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struct gicc_v3_path gicc_v3;
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};
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};
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#define DEVICE_PATH_MAX 40
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#define BUS_PATH_MAX (DEVICE_PATH_MAX+10)
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extern const char *dev_path_name(enum device_path_type type);
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#endif /* DEVICE_PATH_H */
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