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Paul Burton 3790e1340d Makefile.inc: Remove duplication of ROMSTAGE_ELF assignment
The ROMSTAGE_ELF variable is assigned based upon the architecture the
romstage is being built for. x86 uses a unique value but arm & arm64
both use the same value which MIPS will also share. Remove the
duplication of the assignment by special casing x86 only.

Change-Id: Id4307c30d91fde8dc48f89b2eb6f5b16b45e0c67
Suggested-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-on: https://chromium-review.googlesource.com/208932
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-07-23 11:08:49 +00:00
configs coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00
documentation sconfig: rename lapic_cluster -> cpu_cluster 2013-02-14 07:07:20 +01:00
payloads libpayload: Let GDB stub read/write memory with aligned MMIO words 2014-07-22 01:24:00 +00:00
src coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00
util cbfstool: Add the MIPS architecture 2014-07-23 11:08:43 +00:00
.gitignore rmodules: add support for rmodtool 2014-03-31 22:25:57 +00:00
COMMIT-QUEUE.ini COMMIT-QUEUE.ini: Add documentation. 2013-11-01 14:08:42 +00:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
Makefile.inc Makefile.inc: Remove duplication of ROMSTAGE_ELF assignment 2014-07-23 11:08:49 +00:00
PRESUBMIT.cfg chromeos: Add PRESUBMIT.cfg 2013-05-01 14:31:10 -07:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00
toolchain.inc build: mipsel cross compiler support 2014-07-23 11:08:36 +00:00

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.