coreboot/src/soc
Martin Roth 270e300e12 fsp_baytrail: Initialize LPC pads in bootblock for port 80
Port 80h codes were coming out of bootblock and romstage scrambled, or
were not coming out at all.  Initializing the LPC signal pads as LPC
fixes that issue.

Change-Id: I16943513f2eb6fe8fa58766aaa82dac182440c34
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7802
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-19 18:43:08 +01:00
..
intel fsp_baytrail: Initialize LPC pads in bootblock for port 80 2014-12-19 18:43:08 +01:00
nvidia tegra124: modify panel init sequence 2014-12-17 20:49:02 +01:00
qualcomm soc/qualcomm/ipq806x/Kconfig: Fix indent style 2014-12-06 10:03:05 +01:00
samsung i2c: Replace the i2c API. 2014-12-16 00:02:43 +01:00
ucb UCB RISCV: Switch to DYNAMIC_CBMEM 2014-12-09 15:20:16 +01:00
Kconfig Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00
Makefile.inc Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00