coreboot/src/cpu/amd/car
Uwe Hermann 36455aade4 Add comments to make it clear why these two lines are written like that:
movl    $REAL_XIP_ROM_BASE, %eax
  orl     $MTRR_TYPE_WRBACK, %eax

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-02 20:51:29 +00:00
..
cache_as_ram.inc Add comments to make it clear why these two lines are written like that: 2010-10-02 20:51:29 +00:00
disable_cache_as_ram.c Following patch reworks car_disable into C. Tested, works here. I compared 2010-05-16 21:51:34 +00:00
post_cache_as_ram.c Remove another set of includes from Fam10 romstages: 2010-05-14 11:02:56 +00:00