coreboot/src/northbridge
Arthur Heymans 360d94745f nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK
There is some overlap between romstage and bootblock.
LPC setup and BAR initialization is now done twice.
The rationale is that the romstage should not depend too
much on the bootblock, since it can reside in a RO fmap
region.

Enabling the console will be done in a followup patch.

Change-Id: I4d0ba29111a5df6f19033f5ce95adcc0d9adc1fd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-11-18 11:47:58 +00:00
..
amd src/[northbridge,security]: change "unsigned" to "unsigned int" 2019-10-27 18:12:50 +00:00
intel nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK 2019-11-18 11:47:58 +00:00
via/vx900 cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE 2019-11-03 06:15:35 +00:00