Raul E Rangel 35e27b34f5 soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads ... We are currently reading the uCode for each CPU. This is unnecessary since the uCode never changes. BUG=b:177909625 TEST=Boot guybrush and see "microcode: being updated to patch id" for each CPU. I no longer see CBFS access for each CPU. This drops device initialization time by 32 ms. Also boot Ezkinil and verify microcode was also updated. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I98b9d4ce8290a1f08063176809e903e671663208 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55987 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2021-07-02 23:12:34 +00:00
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cezanne	soc/amd/cezanne: Enable SPI DMA support	2021-07-02 23:12:19 +00:00
common	soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads	2021-07-02 23:12:34 +00:00
picasso	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
stoneyridge	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
Kconfig	soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig	2020-11-19 14:29:14 +00:00