coreboot/src
Srinidhi N Kaushik 34c5905614 vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3444
Update FSP headers for Tiger Lake platform generated based on FSP
version 3444. Previous version was 3425.

BUG=b:173160613
BRANCH=none
TEST=build and boot delbin

Cq-Depend:chrome-internal:3403586, chrome-internal:3403392
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I9e5de1617d00cd7543d4de1660f448e2fe220b0a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47555
Reviewed-by: Dossym Nurmukhanov <dossym@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-15 05:14:55 +00:00
..
acpi acpigen: Add more useful helper functions 2020-11-09 07:30:01 +00:00
arch arch/x86/smbios: Populate SMBIOS type 7 with cache information 2020-10-26 06:54:04 +00:00
commonlib lib/libpayload: Replace strapping_ids with new board configuration entry 2020-10-30 15:25:28 +00:00
console console: Override uart base address 2020-11-09 07:46:10 +00:00
cpu cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers 2020-11-10 06:18:05 +00:00
device device: Move pci_dev_is_wake_source function 2020-11-09 07:37:57 +00:00
drivers mrc_cache: Move code for triggering memory training into mrc_cache 2020-11-13 22:57:50 +00:00
ec ec/purism/librem/ec.asl: End comment 2020-11-09 07:28:53 +00:00
include soc/intel/alderlake: Add PCH ID 0x5181 2020-11-12 03:51:49 +00:00
lib lib/libpayload: Replace strapping_ids with new board configuration entry 2020-10-30 15:25:28 +00:00
mainboard mrc_cache: Move code for triggering memory training into mrc_cache 2020-11-13 22:57:50 +00:00
northbridge mrc_cache: Move code for triggering memory training into mrc_cache 2020-11-13 22:57:50 +00:00
security sec/intel/cbnt: Stitch in ACMs in the coreboot image 2020-11-10 06:17:24 +00:00
soc soc/intel/cnl: enable ACPI CPPC entries generation 2020-11-14 18:54:35 +00:00
southbridge sb/intel/lynxpoint/acpi/pch.asl: Drop unused FD definitions 2020-11-13 13:05:05 +00:00
superio superio/nuvoton: Factor out equivalent Kconfig option 2020-10-19 07:06:20 +00:00
vendorcode vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3444 2020-11-15 05:14:55 +00:00
Kconfig soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00