Arthur Heymans e33c50d74c cpu/amd/{agesa,pi}: Select NO_FIXED_XIP_ROM_SIZE ... AGESA and binaryPI set the whole CACHE_ROM_SIZE to WRPROT during the romstage and do not reference the CONFIG_XIP_ROM_SIZE symbol. Change-Id: I548b9c9066d825c2f03749353b9990b2efddfd9c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>		2019-10-17 15:11:41 +00:00
..
amd	cpu/amd/{agesa,pi}: Select NO_FIXED_XIP_ROM_SIZE	2019-10-17 15:11:41 +00:00
armltd
intel	nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCK	2019-10-13 12:46:18 +00:00
qemu-power8	AUTHORS: Move src/cpu copyrights into AUTHORS file	2019-09-10 12:51:22 +00:00
qemu-x86	cpu/qemu-x86: Enable TSC_MONOTONIC_TIMER	2019-09-18 13:01:03 +00:00
ti	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
via	cpu/via/nano: Enable TSC_MONOTONIC_TIMER	2019-09-18 13:01:13 +00:00
x86	cpu,device/: Remove some __SIMPLE_DEVICE__ and __ROMCC__ use	2019-09-28 21:18:03 +00:00
Kconfig	amdfam10-15: Rename DCACHE_BSP_STACK_SIZE	2019-08-18 08:09:21 +00:00
Makefile.inc