coreboot/src
Lijian Zhao 331dfaff70 mb/google/sarien: Disable unused SATA ports
Disable SATA port 0 and port 1 as that's not used as SATA on platform.

BUG=N/A
TEST=Build and boot up fine on google arcada board.

Change-Id: I1b8801f7a0f9b7847b85d7c315fa0a2093b32f70
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/30091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
2018-12-11 08:59:13 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch riscv: fix non-SMP support 2018-12-07 11:37:53 +00:00
commonlib src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
console (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
cpu cpu/x86/pae: Fix pointer casts 2018-12-05 16:57:15 +00:00
device arch/power8: Rename to ppc64 2018-11-30 20:02:17 +00:00
drivers drivers/generic/gpio_keys: Add mechanism to configure GPE wake event 2018-12-10 09:07:08 +00:00
ec lenovo/h8,thinkpads: Re-do USB Always On 2018-12-06 11:59:22 +00:00
include smmstore: make smmstore's SMM handler code follow everything else 2018-12-05 13:31:22 +00:00
lib cbfs: Alert if something goes wrong in cbfs_boot_locate() 2018-12-07 11:34:54 +00:00
mainboard mb/google/sarien: Disable unused SATA ports 2018-12-11 08:59:13 +00:00
northbridge nb/intel/gm45: Make fetching the blc_pwm freq global 2018-12-03 13:03:13 +00:00
security tss: implement tlcl_save_state 2018-11-28 18:32:59 +00:00
soc soc/intel/braswell/northcluster.c: Fix typo 2018-12-11 08:57:53 +00:00
southbridge sb/amd/pi/hudson: Fix UART address math 2018-12-07 11:34:13 +00:00
superio src: Add required space after "switch" 2018-11-19 08:17:06 +00:00
vendorcode vendorcode/cavium: Supply bdk_pop and bdk_dpop definitions 2018-11-28 11:47:59 +00:00
Kconfig cpu/x86/Kconfig.debug: Move more options here 2018-11-23 08:38:31 +00:00