coreboot/src
Lee Leahy 32f54508ec soc/intel/quark: Remove TODO message from FspUpdVpd.h
Remove the TODO message from FspUpdVpd.h

TEST=Build and run on Galileo Gen2

Change-Id: Icd565c6062ef59b1e4a68310bb6f9ed62fb014af
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16114
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-08-09 03:07:51 +02:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch acpi: Generate object for coreboot table region 2016-08-06 04:35:43 +02:00
commonlib commonlib/region: make buffer argument const for writeat 2016-08-08 18:34:17 +02:00
console arch/x86: Enable postcar console 2016-08-01 21:40:23 +02:00
cpu Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
device src/device: Capitalize CPU, RAM and ROM 2016-07-31 18:33:30 +02:00
drivers drivers/elog: treat offsets relative to start of mirror 2016-08-08 22:06:22 +02:00
ec google/chromeec: Enable/Disable ccache with config variable 2016-08-08 17:36:12 +02:00
include elog: Include declarations for boot count functions unconditionally 2016-08-02 18:37:55 +02:00
lib lib/timestamp: Add timestamps to CBMEM in POSTCAR stage 2016-08-04 03:27:08 +02:00
mainboard mainboard/google/rush_ryu: remove rush_ryu mainboard 2016-08-09 01:31:59 +02:00
northbridge amd/amdfam10: eliminate dead code 2016-08-02 14:02:51 +02:00
soc soc/nvidia/tegra210: remove unused spi boot device support 2016-08-09 01:33:03 +02:00
southbridge chromeos chipsets: select RTC usage 2016-08-08 18:37:37 +02:00
superio superio/fintek/f81866d: Add support for UART 3/4 2016-08-02 18:57:36 +02:00
vboot src/vboot: Capitalize RAM and CPU 2016-07-31 19:31:41 +02:00
vendorcode soc/intel/quark: Remove TODO message from FspUpdVpd.h 2016-08-09 03:07:51 +02:00
Kconfig sconfig: pass in devicetree filename 2016-08-08 19:14:33 +02:00