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Furquan Shaikh 32bc1dc531 mb/google/hatch: Bump up the BIOS region to 28MiB 
This change bumps up the BIOS region to 28MiB to use the hole
between SI_ALL and SI_BIOS. Since this SPI flash part is 32MiB, only
the top 16MiB actually gets memory mapped. Thus, the change ensures
that only RW_LEGACY lies in the 12MiB that is not memory mapped.

BUG=b:123443737
TEST=Verified that hatch still boots up. Ensured that fmap dump looks
correct.

Change-Id: I5832d2b89c7eedfc270755e2add16131cfbddff4
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/31376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
2019-02-13 18:46:39 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
commonlib buildsystem: Promote rules.h to default include 2019-01-16 11:51:07 +00:00
console device/pci_early.c: Drop some guards 2019-02-11 11:32:20 +00:00
cpu cpu/intel/common: Add Nehalem for FSB detection 2019-02-13 13:02:06 +00:00
device device/pci_ops: Apply some symmetry in headers 2019-02-11 20:44:37 +00:00
drivers soc/intel/fsp_broadwell_de: Move FSP_DEBUG_LEVEL option here 2019-02-11 12:23:54 +00:00
ec ec/lenovo/h8/Kconfig: increase ps2 kbd timeout from 3000 to 5000ms 2019-02-11 12:24:22 +00:00
include coreboot: check Cr50 PM mode on normal boot 2019-02-13 13:03:33 +00:00
lib riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
mainboard mb/google/hatch: Bump up the BIOS region to 28MiB 2019-02-13 18:46:39 +00:00
northbridge nb/intel/nehalem: Remove CAR_GLOBAL use 2019-02-12 22:16:42 +00:00
security coreboot: check Cr50 PM mode on normal boot 2019-02-13 13:03:33 +00:00
soc soc/intel/cannonlake: Configure serial debug uart 2019-02-13 13:04:38 +00:00
southbridge sb/intel/common: Remove CAR_GLOBAL use 2019-02-12 22:17:37 +00:00
superio src: Remove unused include device/pnp_def.h 2019-02-07 08:53:07 +00:00
vendorcode coreboot: check Cr50 PM mode on normal boot 2019-02-13 13:03:33 +00:00
Kconfig Kconfig: Add system type entries for common enclosures 2019-02-05 16:03:29 +00:00