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coreboot/src/include/device
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Kyösti Mälkki 0a3d4e4b03 AMD K8 fam10: Refactor HT link connection test 
Change-Id: I1e935a6b848a59f7f2e58779bceea599032de9e3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8562
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-06-05 10:18:05 +02:00
..
dram ddr3: Plumber DIMM type to parsed structure. 2014-12-07 15:18:41 +01:00
azalia.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
azalia_device.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
cardbus.h
device.h AMD K8 fam10: Refactor HT link connection test 2015-06-05 10:18:05 +02:00
drm_dp_helper.h
early_smbus.h src/include: Doxygen fixes 2015-01-09 06:04:55 +01:00
hypertransport.h AMD K8 fam10: Refactor HT link connection test 2015-06-05 10:18:05 +02:00
hypertransport_def.h AMD K8 fam10: Refactor offset_unitid configuration 2015-02-20 07:04:00 +01:00
i2c.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
path.h
pci.h devicetree: Change scan_bus() prototype in device ops 2015-06-04 11:22:53 +02:00
pci_def.h PCI - Add interrupt disable bit definition 2015-04-10 20:10:55 +02:00
pci_ehci.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
pci_ids.h AMD Bald Eagle: Add northbridge files for new AMD processor 2015-03-10 16:43:23 +01:00
pci_ops.h pci_ops.{c,h}: Don't hide pointers behind typedefs 2014-11-05 14:45:57 +01:00
pci_rom.h Unify byte order macros and clrsetbits 2015-04-21 08:23:25 +02:00
pciexp.h devicetree: Change scan_bus() prototype in device ops 2015-06-04 11:22:53 +02:00
pcix.h devicetree: Change scan_bus() prototype in device ops 2015-06-04 11:22:53 +02:00
pnp.h superio: Replace the indexed I/O functions 2015-05-14 20:49:24 +02:00
pnp_def.h
resource.h x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
smbus.h
smbus_def.h