Nico Huber 327c04a6a5 Revert "src/soc/intel/cannonlake: Update C-state latency control limits" ... This reverts commit 66dbb0c5d6. The numbers were meant for Cannon Lake, but the code was also meant to be used for all other platforms using the Cannon Point PCH. Now Cannon Lake support is even dropped, so we can cleanly revert to the recommended values for the other platforms. Change-Id: Iea56c6a29ca4b34c9852393fed2e3be4de128ec6 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56662 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-08-19 18:17:00 +00:00
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amd	acpi: Fill fadt->century based on Kconfig	2021-08-19 18:16:04 +00:00
cavium
example	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
intel	Revert "src/soc/intel/cannonlake: Update C-state latency control limits"	2021-08-19 18:17:00 +00:00
mediatek	device: Move MIPI panel library from mainboard/google/kukui into common	2021-08-18 14:21:28 +00:00
nvidia	soc/nvidia/tegra124: Increase bootblock size	2021-07-26 05:05:41 +00:00
qualcomm	sc7180: Add display support for mipi panels	2021-08-03 21:22:26 +00:00
rockchip
samsung	commonlib/region: Turn addrspace_32bit into a more official API	2021-04-21 02:06:26 +00:00
sifive
ti
ucb