coreboot/src/soc
Ravi Sarawadi 31e0aeb747 soc/intel/meteorlake: Increase pcie snoop/non-snoop latency
This fixes an issue where pcie was not power gating and blocked
S0ix entry. Overwrite pcie max non-snoop and snoop latency tolerance
values to 15.73ms as stated in doc #729123 - MTL External Design
Specification.

BUG=none
TEST=Boot google/rex, print/check values.

Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.corp-partner.google.com>
Change-Id: I9dfb9edbac95d28d50653777466ea172be64f612
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68308
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-11 08:18:39 +00:00
..
amd Revert "soc/amd/cezanne/romstage: Preload fspm.bin" 2023-05-08 21:03:55 +00:00
cavium treewide: Remove duplicated include <device/pci.h> 2023-02-01 03:03:34 +00:00
example/min86
intel soc/intel/meteorlake: Increase pcie snoop/non-snoop latency 2023-05-11 08:18:39 +00:00
mediatek soc/mediatek/mt8183: Fix set but unused variable 2023-04-24 13:58:13 +00:00
nvidia treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
qualcomm qualcomm/common: Pass FMAX_LIMIT flag for Lazor board to QcLib 2023-03-17 00:34:08 +00:00
rockchip
samsung treewide: Fix old-style declarations 2023-01-17 04:23:49 +00:00
sifive/fu540
ti src/soc/ti: Remove unnecessary space after casts 2022-11-22 13:42:28 +00:00
ucb/riscv