Angel Pons 31b7ee4201 treewide: Replace uses of "Nehalem" ... The code in coreboot is actually for the Arrandale processors, which are a MCM (Multi-Chip Module) with two different dies: - Hillel: 32nm Westmere dual-core CPU - Ironlake: 45nm northbridge with integrated graphics This has nothing to do with the older, single-die Nehalem processors. Therefore, replace the references to Nehalem with the correct names. Change-Id: I8c10a2618c519d2411211b9b8f66d24f0018f908 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38942 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-03-15 13:04:39 +00:00
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em64t100_save_state.h	cpu/intel/smm: Drop em64t save state	2019-11-22 10:48:11 +00:00
em64t101_save_state.h	treewide: Replace uses of "Nehalem"	2020-03-15 13:04:39 +00:00
fsb.h	cpu/x86/lapic: Refactor timer_fsb()	2019-09-19 09:28:55 +00:00
hyperthreading.h	cpu/intel/common: Move intel_ht_sibling() to common folder	2019-10-01 15:10:16 +00:00
l2_cache.h	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	2018-10-11 21:06:53 +00:00
microcode.h	Fix typos involving "the the"	2018-12-18 13:24:28 +00:00
smm_reloc.h	intel/smm: Provide common smm_relocation_params	2019-11-22 06:37:50 +00:00
speedstep.h	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	2018-10-11 21:06:53 +00:00
turbo.h	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	2018-10-11 21:06:53 +00:00