Jincheng Li 3199802045 soc/intel/xeon_sp: Share DDR codes across Xeon-SP platforms ... DDR support codes across generations are similar. Share the codes to improve code reuse. TEST=intel/archercity CRB Change-Id: I237d561003671d70dfaaa9823a0cf16d6e1f50cf Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81219 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>		2024-03-26 10:10:48 +00:00
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amd	soc/amd/common/noncar/memmap: reduce visibility of memmap_early_dram	2024-03-23 21:24:32 +00:00
cavium	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
example/min86	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
intel	soc/intel/xeon_sp: Share DDR codes across Xeon-SP platforms	2024-03-26 10:10:48 +00:00
mediatek	treewide: Move stdlib.h to commonlib	2024-03-15 10:09:43 +00:00
nvidia	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
qualcomm	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
rockchip	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
samsung	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
sifive	src: Add missing SPDX license headers	2024-03-23 15:58:17 +00:00
ti	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
ucb/riscv	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00