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coreboot/src/southbridge
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Kyösti Mälkki 2fa8cc35a8 AGESA hudson: Fix SPI writes 
Only yangtze has longer FIFO in SPI controller. This was overlooked
in commit

   9f0a2be AMD SPI: Optimise for longer writes

which broke SPI writes and caused CBFS errors with fam15tn.

Change-Id: I821e3f1fa186d2383b30eab9c5d52797c2ef22c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6273
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-15 01:56:09 +02:00
..
amd AGESA hudson: Fix SPI writes 2014-07-15 01:56:09 +02:00
broadcom Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
dmp src/drivers/pc80: Remove empty struct keyboard 2014-05-13 10:03:51 +02:00
intel SPI: Split writes using spi_crop_chunk() 2014-07-14 19:42:49 +02:00
nvidia southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
rdc southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
ricoh southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
sis southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
ti southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
via southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
Kconfig Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00