coreboot/src/soc/mediatek
Arthur Heymans 0b0113f243 device/device.h: Rename pci_domain_scan_bus
On all targets the domain works as a host bridge. Xeon-sp code intends
to feature multiple host bridges below a domain, hence rename the
function to pci_host_bridge_scan_bus.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I4e65fdbaf0b42c5f4f62297a60d818d299d76f73
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78326
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
2023-10-20 14:24:57 +00:00
..
common
mt8173 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
mt8183 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
mt8186 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
mt8188 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
mt8192 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
mt8195 device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00