Michał Żygowski 56621e1e57 soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden ... Set the P2SB device as hidden as FSP-S is hiding the PCI configuration space from coreboot on Alder Lake systems. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I5cfde7c1f6791578a03d73e89bcde31af608f12d Reviewed-on: https://review.coreboot.org/c/coreboot/+/69950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>		2023-04-11 16:35:06 +00:00
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acpi	soc/intel: Move USB PORTSC definition into IA common code	2023-03-26 19:44:15 +00:00
bootblock	soc/intel/adl: Correct wrongly reported ADL PCH SKU	2023-02-15 13:16:36 +00:00
include/soc	soc/intel/alderlake: Hook up P2SB PCI ops	2023-04-11 16:34:48 +00:00
romstage	soc/intel/alderlake: Hook the VT-d DMA protection option	2023-03-17 13:54:34 +00:00
acpi.c	soc/intel/adl: remove DPTF from D-states list used to enter LPM	2023-01-27 14:50:20 +00:00
chip.c	soc/intel/alderlake: Hook up P2SB PCI ops	2023-04-11 16:34:48 +00:00
chip.h	soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP	2023-04-02 06:27:50 +00:00
chipset.cb	soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden	2023-04-11 16:35:06 +00:00
chipset_pch_s.cb	soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden	2023-04-11 16:35:06 +00:00
cpu.c	soc/intel/alderlake: Enable 'struct cpu_info' update for ADL	2023-03-31 08:37:28 +00:00
crashlog.c	soc/intel/alderlake: Avoid reprogramming the SRAM BAR	2023-03-30 13:35:06 +00:00
cse_telemetry.c	soc/intel/alderlake: Add support for CSE timestamp data versions	2023-04-04 08:07:56 +00:00
elog.c	sb,soc/intel: Address TCO SECOND_TO_STS name collision	2022-11-28 10:09:04 +00:00
espi.c	src: Match array format in function declarations and definitions	2021-05-13 18:34:38 +00:00
finalize.c	treewide: Remove unused 'include <arch/io.h>'	2022-12-15 13:37:41 +00:00
fsp_params.c	soc/intel/{adl, cmn, mtl}: Refactor MP Init related configs	2023-02-25 09:29:19 +00:00
gpio.c	soc/intel/alderlake: Use common gpio.h include	2022-12-27 15:23:11 +00:00
gpio_pch_s.c	soc/intel/alderlake: Use common gpio.h include	2022-12-27 15:23:11 +00:00
graphics.c	soc/intel/alderlake: Hook up GMA ACPI brightness controls	2022-11-03 12:58:26 +00:00
gspi.c	soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage	2020-10-03 12:15:22 +00:00
hsphy.c	soc/intel/alderlake/hsphy.c: Handle case with DMA protection	2023-03-17 13:54:09 +00:00
i2c.c	soc/intel/alderlake: Add support for I2C6 and I2C7	2021-07-20 13:35:10 +00:00
Kconfig	mb/google/brya: Enable asynchronous End-Of-Post	2023-04-07 04:50:59 +00:00
lockdown.c	soc/intel: Update API name pmc_send_bios_reset_pci_enum_done	2023-03-09 13:38:07 +00:00
Makefile.inc	soc/intel/alderlake: Add support for CSE timestamp data versions	2023-04-04 08:07:56 +00:00
meminit.c	soc/intel/alderlake: Allow channel 0 for memory-down	2023-03-04 02:06:33 +00:00
p2sb.c	soc/intel/alderlake/romstage: Do initial SoC commit till romstage	2020-09-15 15:13:50 +00:00
pcie_rp.c	soc/alderlake: Add ADL-S PCIe support	2022-06-28 09:19:09 +00:00
pmc.c	soc/intel: Use PWRMBASE over static Index 0 for PMC	2022-11-08 14:12:27 +00:00
pmutil.c	treewide: Remove duplicated include <device/pci.h>	2023-02-01 03:03:34 +00:00
reset.c	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
retimer.c	soc/intel/alderlake/retimer: Change loglevel prefix	2022-03-17 14:43:30 +00:00
smihandler.c	soc/intel/alderlake: Use PMC IPC to disable HECI1	2022-02-02 07:39:51 +00:00
soundwire.c	soc/intel/common: Move PMC EPOC related code to Intel common code	2021-06-30 07:34:44 +00:00
spi.c	soc/intel/spi: Move BIOS flash SPI controllers to fast SPI driver	2022-09-22 15:34:24 +00:00
systemagent.c	src/soc/intel: Remove unnecessary space after casts	2022-11-26 23:39:16 +00:00
tcss.c	soc/intel/common: Abstract the common TCSS functions	2022-04-06 16:19:18 +00:00
uart.c	soc/intel/*: drop UART pad configuration from common code	2021-03-12 08:48:03 +00:00
vr_config.c	soc/intel/alderlake: Fix RPL-U 15W and RPL-P 28W TDC current values	2023-04-03 13:24:40 +00:00
xhci.c	soc/intel/alderlake: Correct TCSS XHCI Port status offset	2021-06-08 15:25:29 +00:00