coreboot/src/cpu/via
Patrick Georgi 1f807fd42f - Fix UDELAY options and HAVE_INIT_TIMER [kconfig]
(defaults to UDELAY_IO again, like newconfig)
- Use UDELAY_TSC on Via C7 [kconfig]
- Support Tinybootblock on Intel CPUs
- set XIP location correctly for Tinybootblock on Intel
- provide correct XIP location in Tinybootblock configuration
- Make kontron/986lcd-m use Tinybootblock
- Some kconfig fixes to kontron/986lcd-m [kconfig]

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-04 20:09:27 +00:00
..
car White space and comment fixes for cache_as_ram.inc files so it's easier to spot 2009-10-23 18:22:27 +00:00
model_c3 Remove some more instances of including previous empty x86/fpu/Makefile.inc 2009-10-17 02:51:26 +00:00
model_c7 - Fix UDELAY options and HAVE_INIT_TIMER [kconfig] 2010-01-04 20:09:27 +00:00
Kconfig Make all Kconfig enabled boards build (tested with kbuildall). 2009-09-24 09:03:06 +00:00
Makefile.inc This goes a surprisingly long way to building the epia-n. It also has 2009-08-20 18:05:31 +00:00