864dc3b008
This also drops individual copyright notices, all mentioned authors in that part of the tree are already listed in AUTHORS. Change-Id: Ic2bab77edaf7ad97b7f3278cb108226a18cf3791 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39278 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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/*
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* This file contains arm architecture specific defines
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* for the different processors.
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*
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* Adapted from Linux arch/arm/include/assembler.h
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*
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* Do not include any C declarations in this file - it is included by
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* assembler source.
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*/
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/*
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* WARNING: This file is *only* meant for memcpy.S and friends which were copied
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* from Linux and require some weird macros. It does unspeakable things like
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* redefining "push", so do *not* try to turn it into a general assembly macro
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* file, and keep it out of global include directories.
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*/
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#ifndef __ARM_ASMLIB_H__
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#define __ARM_ASMLIB_H__
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/*
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* Endian independent macros for shifting bytes within registers.
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*/
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#ifndef __ARMEB__
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#define pull lsr
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#define push lsl
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#define get_byte_0 lsl #0
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#define get_byte_1 lsr #8
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#define get_byte_2 lsr #16
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#define get_byte_3 lsr #24
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#define put_byte_0 lsl #0
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#define put_byte_1 lsl #8
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#define put_byte_2 lsl #16
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#define put_byte_3 lsl #24
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#else
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#define pull lsl
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#define push lsr
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#define get_byte_0 lsr #24
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#define get_byte_1 lsr #16
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#define get_byte_2 lsr #8
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#define get_byte_3 lsl #0
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#define put_byte_0 lsl #24
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#define put_byte_1 lsl #16
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#define put_byte_2 lsl #8
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#define put_byte_3 lsl #0
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#endif
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/*
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* Data preload for architectures that support it
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*/
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#if __COREBOOT_ARM_ARCH__ >= 5
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#define PLD(code...) code
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#else
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#define PLD(code...)
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#endif
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/*
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* This can be used to enable code to cacheline align the destination
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* pointer when bulk writing to memory. Linux doesn't enable this except
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* for the "Feroceon" processor, so we better just leave it out.
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*/
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#define CALGN(code...)
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#endif /* __ARM_ASMLIB_H__ */
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