coreboot/src/soc/intel/elkhartlake
Subrata Banik d19ebe0bd5 soc/intel: Rename pcr.asl to pch_pcr.asl
The PCR (Private Configuration Register) is applicable to access the
P2SB register space starting with the Intel SkyLake generation of SoC.

Prior to Intel Meteor Lake SoC generation, the only P2SB existed inside
the PCH die. Starting with Meteor Lake SoC, there are two P2SB, one in
SoC die (same as PCH die for U/H SoC) and another in IOE die.

This patch renames pcr.asl to pch_pcr.asl to reflect the actual source
of the P2SB IP in the die (i.e., SoC die or PCH die).

BUG=b:290856936
TEST=Able to build and boot google/rex.

Change-Id: Idb66293eaab01e1d4bcd4e9482157575fb0adf04
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76407
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2023-07-13 16:37:56 +00:00
..
acpi soc/intel: Rename pcr.asl to pch_pcr.asl 2023-07-13 16:37:56 +00:00
bootblock src/soc/intel: Remove unnecessary space after casts 2022-11-26 23:39:16 +00:00
include/soc soc/intel/ehl: Select CSE defined ME spec version for elkhartlake 2023-02-24 12:09:23 +00:00
romstage soc/intel: Add max memory speed into dimm info 2023-06-15 15:08:12 +00:00
acpi.c soc/intel: Set IO APIC DMAR entry based on hw 2022-12-07 23:03:04 +00:00
chip.c soc/intel/elkhartlake: Use common gpio.h include 2023-01-18 05:20:01 +00:00
chip.h soc/intel/elkhartlake: Make PCIe root port max payload size configurable 2023-05-24 11:25:24 +00:00
cpu.c soc/intel: Use common codeflow for MP init 2023-02-23 08:53:38 +00:00
espi.c treewide: Remove unused 'include <arch/io.h>' 2022-12-15 13:37:41 +00:00
finalize.c commonlib/console/post_code.h: Change post code prefix to POSTCODE 2023-06-23 15:06:04 +00:00
fsp_params.c soc/intel/elkhartlake: Make PCIe root port max payload size configurable 2023-05-24 11:25:24 +00:00
gpio.c soc/intel/elkhartlake/gpio.c: Fix GPD reset map 2023-02-23 12:18:24 +00:00
gspi.c
i2c.c
Kconfig soc/intel/elkhartlake: Define DIMM_SPD_SIZE in SoC Kconfig 2023-03-23 08:46:34 +00:00
lockdown.c
Makefile.inc soc/intel/ehl: Select CSE defined ME spec version for elkhartlake 2023-02-24 12:09:23 +00:00
meminit.c
p2sb.c
pmc.c soc/intel/*/pmc.c: Use newer function for resource declarations 2023-07-12 09:31:17 +00:00
pmutil.c treewide: Remove duplicated include <device/pci.h> 2023-02-01 03:03:34 +00:00
reset.c
sd.c
smihandler.c
spi.c
systemagent.c
tsn_gbe.c soc/intel/ehl: Add MDIO operation to TSN GbE device 2022-11-24 05:56:37 +00:00
uart.c