coreboot/src
Felix Held 2d4986c168 cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
All x86-based CPUs and SoCs in the coreboot tree end up including the
Makefile in cpu/x86/mtrr, so include this directly in the Makefile in
cpu/x86 to add it for all x86 CPUs/SoCs. In the unlikely case that a new
x86 CPU/SoC will be added, a CPU_X86_MTRR Kconfig option that is
selected be default could be added and the new CPU/SoC without MTRR
support can override this option that then will be used in the Makefile
to guard adding the Makefile from the cpu/x86/mtrr sub-directory.

In cpu/intel all models except model 2065X and 206AX are selcted by a
socket and rely on the socket's Makefile.inc to add x86/mtrr to the
subdirs, so those models don't add x86/mtrr themselves. The Intel
Broadwell SoC selects CPU_INTEL_HASWELL and which added x86/mtrr to the
subdirs. The Intel Xeon SP SoC directory contains two sub-folders for
different versions or generations which both add x86/mtrr to the subdirs
in their Makefiles.

Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44230
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-10-25 20:18:40 +00:00
..
acpi acpigen,soc/amd,cpu/intel: rework static DWORD for CPPC table 2021-10-21 20:03:14 +00:00
arch arch/x86: fix a wrong variable in ioapic_set_max_vectors() 2021-10-23 16:33:58 +00:00
commonlib src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
console src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
cpu cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs 2021-10-25 20:18:40 +00:00
device src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
drivers drivers/pc80/tpm: Use '%u' as printf formatter for unsigned variables 2021-10-25 16:12:15 +00:00
ec ec/google/chromeec: Register USB-C mux operations 2021-10-06 22:20:32 +00:00
include include/device: ensure valid link/bus is passed to mp_cpu_bus_init 2021-10-22 14:58:31 +00:00
lib lib/cbfs: Call rdev_unmap on hash mismatch 2021-10-20 15:55:21 +00:00
mainboard mb/google/brya/variants/gimble: Enable Bluetooth offload support 2021-10-25 14:23:20 +00:00
northbridge AGESA binaryPI: Use common acpi_fill_madt() 2021-10-22 14:28:27 +00:00
security Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" 2021-10-15 13:00:32 +00:00
soc cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs 2021-10-25 20:18:40 +00:00
southbridge arch/x86/ioapic: Select IOAPIC with SMP 2021-10-22 14:18:45 +00:00
superio src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
vendorcode vc/amd/fsp/cezanne: Add UPD fsp_owns_pcie_resets to FSP-M for Cezanne 2021-10-11 15:55:35 +00:00
Kconfig arch/x86/ioapic: Select IOAPIC with SMP 2021-10-22 14:18:45 +00:00