coreboot/src
V Sowmya 2d324cafd8 mb/google/hatch: Enable NVME support for Hatch
This patch enables the x4 NVME device for hatch,
* Enable the Root port 9.
* Assign the usage type for clock source.
* Configure the GPIO for CLK SRC 1.

BUG=b:120914069
BRANCH=none
TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot.

Change-Id: I69be6b21a5ae5962877a5c38180b5ffac532fed4
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/30431
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-31 06:13:41 +00:00
..
acpi
arch arch/x86: Add CAR stack location symbols 2018-12-30 12:36:30 +00:00
commonlib src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
console device/pci_early: Fixes for __SIMPLE_DEVICE__ 2018-12-30 21:33:26 +00:00
cpu arch/x86: Add CAR stack location symbols 2018-12-30 12:36:30 +00:00
device device/pci_early: Fixes for __SIMPLE_DEVICE__ 2018-12-30 21:33:26 +00:00
drivers drivers/uart/oxpcie: Fix early console 2018-12-30 21:32:24 +00:00
ec ec/chromeec: fix LPC read/write for MEC devices 2018-12-28 12:24:52 +00:00
include device/pci_early: Fixes for __SIMPLE_DEVICE__ 2018-12-30 21:33:26 +00:00
lib arch/x86 cbmem: Drop tests for LATE_CBMEM_INIT 2018-12-22 11:48:37 +00:00
mainboard mb/google/hatch: Enable NVME support for Hatch 2018-12-31 06:13:41 +00:00
northbridge nb/intel/haswell: Handle boards that do not support IGD 2018-12-29 07:14:47 +00:00
security tss: implement tlcl_save_state 2018-11-28 18:32:59 +00:00
soc soc/intel: Fix ugly preprocessor macro 2018-12-30 21:35:54 +00:00
southbridge soc/intel: Fix ugly preprocessor macro 2018-12-30 21:35:54 +00:00
superio superio/smsc/sch5147/acpi/superio.asl: Remove unneeded white spaces 2018-12-28 22:32:48 +00:00
vendorcode chromeos: Provide watchdog support in verstage 2018-12-21 18:14:20 +00:00
Kconfig cbmem: Always use EARLY_CBMEM_INIT 2018-12-22 11:49:17 +00:00