coreboot/src
Raul E Rangel 2c952d6bd9 device/xhci: Add helper method to iterate over xhci_supported_protocl
There is some boilerplate required to iterate over the USB supported
protocol structs. Encapsulate all the in a method to make the callers
simpler.

BUG=b:154756391
TEST=Built test trembyle.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I401f10d242638b0000ba697573856d765333dca0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43352
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-12 17:01:24 +00:00
..
acpi acpigen: Add acpigen_notify 2020-07-07 20:31:22 +00:00
arch arch/x86: Drop CBMEM_TOP_BACKUP 2020-07-11 14:48:25 +00:00
commonlib lib/coreboot_table: Add Intel FSP version to coreboot table 2020-07-04 11:20:08 +00:00
console
cpu arch/x86: Drop CBMEM_TOP_BACKUP 2020-07-11 14:48:25 +00:00
device device/xhci: Add helper method to iterate over xhci_supported_protocl 2020-07-12 17:01:24 +00:00
drivers drivers/usb/ehci_debug.c: Drop preprocessor usage 2020-07-11 22:26:42 +00:00
ec ec/google: Add function ec_fill_dptf_helpers() 2020-07-07 20:31:30 +00:00
include device/xhci: Add helper method to iterate over xhci_supported_protocl 2020-07-12 17:01:24 +00:00
lib src/lib: Remove redundant code in imd.c 2020-07-11 14:10:19 +00:00
mainboard haswell: Move some MRC settings to devicetree 2020-07-12 11:16:12 +00:00
northbridge nb/intel/haswell/romstage.c: Align pei_data initializers 2020-07-12 11:16:37 +00:00
security security/vboot/secdata_tpm.c: Drop dead code 2020-07-09 21:29:27 +00:00
soc arch/x86: Drop CBMEM_TOP_BACKUP 2020-07-11 14:48:25 +00:00
southbridge sb/intel/lynxpoint: Add PCH platform type function 2020-07-12 10:08:54 +00:00
superio
vendorcode vc/amd/pi/00660F01: Drop dead code 2020-07-10 23:58:12 +00:00
Kconfig arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00