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coreboot/src/mainboard/google
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Subrata Banik 2c3054c14e soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 
Program USB Overcurrent pins as per board schematics definition.

BUG=none
BRANCH=none
TEST=Build and boot kunimitsu from USB device.

Change-Id: I6aeb65953c753e09ad639469de7d866a54f42f11
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/17570
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-11-28 19:00:36 +01:00
..
auron Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
auron_paine Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
beltino Add Haswell Chromeboxes/Chromebase using variant board scheme 2016-11-24 05:23:36 +01:00
butterfly intel sandy/ivy: Improve DIMM replacement detection 2016-11-20 21:24:13 +01:00
chell soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
cosmos Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
cyan google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
daisy Kconfig: Prefix hex defaults with 0x 2016-09-30 23:57:02 +02:00
enguarde google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
eve soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
falco Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
foster Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
gale google/gale: Remove #ifdef of Kconfig bool symbol 2016-10-03 22:53:44 +02:00
glados soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
gru google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
guado Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
jecht Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
lars soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-28 19:00:36 +01:00
link intel sandy/ivy: Improve DIMM replacement detection 2016-11-20 21:24:13 +01:00
ninja google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan_big google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
nyan_blaze google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
oak google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
parrot google/parrot: Fix keyboard interrupts, DSDT 2016-11-25 20:50:00 +01:00
peach_pit Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00
peppy Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
purin Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
rambi google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
reef mainboard/google/reef: Set PL1 MAX power limit value to 12W 2016-11-28 01:17:19 +01:00
rikku Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
rotor soc/marvell/mvmap2315: Add DDR driver 2016-09-13 17:03:53 +02:00
samus Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
smaug google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
storm qualcomm/storm: Add required files to enable elog in ramstage 2016-07-28 00:38:25 +02:00
stout intel sandy/ivy: Improve DIMM replacement detection 2016-11-20 21:24:13 +01:00
tidus Remove explicit select MMCONF_SUPPORT 2016-11-22 04:15:11 +01:00
urara Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-18 22:04:34 +02:00
veyron google/veyron*: change .ddrconfig from 14 to 3 2016-11-03 13:53:56 +01:00
veyron_mickey google/veyron*: change .ddrconfig from 14 to 3 2016-11-03 13:53:56 +01:00
veyron_rialto google/veyron_rialto: Add lpddr3-K4E6E304EB-2GB-1CH memory configuration 2016-10-06 21:49:06 +02:00
Kconfig
Kconfig.name