Eric Lai 2bec7f0a11 mb/google/brya: Initialize overridetree.cb ... Initiate overridetree.cb based on latest schematic. BUG=b:174266035 TEST=Build Test Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I31e5ac1703476083ac71dac30b0a3299b38384c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2021-01-12 21:22:35 +00:00
..
acpi	acpi,soc/intel/common: add support for Intel Low Power Idle Table	2021-01-11 20:49:23 +00:00
arch	arch/x86/Makefile.inc: Clean up generated assembly stubs	2021-01-08 08:10:04 +00:00
commonlib	drivers/tpm: Implement full PPI	2020-12-21 02:38:20 +00:00
console	lib/trace: Remove TRACE support	2020-12-02 23:35:58 +00:00
cpu	cpu/x86/sipi_vector: Simplify loop getting unique CPU number	2021-01-12 13:35:31 +00:00
device	device/pci_device.c: Use same indents for switch/case	2021-01-12 13:33:59 +00:00
drivers	drivers/genesyslogic/gl9763e: Add HS400ES compatibility settings	2021-01-12 04:52:16 +00:00
ec	ec/google/chromeec: add SSFC CBI support	2021-01-08 08:25:42 +00:00
include	device: Use __pci_0_00_0_config in config_of_soc()	2021-01-12 05:22:40 +00:00
lib	arch/x86: Move prologue to .init section	2021-01-07 11:02:03 +00:00
mainboard	mb/google/brya: Initialize overridetree.cb	2021-01-12 21:22:35 +00:00
northbridge	nb/intel/gm45: Guard macro parameters	2021-01-10 23:03:33 +00:00
security	*/Makefile.inc: Add some INTERMEDIATE targets to .PHONY	2021-01-08 08:08:07 +00:00
soc	soc/intel/denverton_ns: Drop redundant DEFAULT_ACPI_BASE	2021-01-12 13:37:10 +00:00
southbridge	sb/intel/bd82x6x: Use PCH_LPC_DEV macro	2021-01-10 15:42:05 +00:00
superio	src/superio: trim and move Makefile.inc, instead use wildcard matches	2020-12-27 14:46:07 +00:00
vendorcode	{soc,vc,mb}/intel: Drop support for Cannon Lake SoC	2021-01-11 17:23:53 +00:00
Kconfig	Kconfig: Show console debug options if loglevel override is set	2020-12-11 15:58:24 +00:00