coreboot/src
Furquan Shaikh 551f701f5d UPSTREAM: vbnv: Do not silently reset cache in read_vbnv
Currently, read_vbnv performs a reset of the vbnv cache if it is not
valid. However, this information is not passed up to the vboot layer,
thus resulting in missed write-back of vbnv cache to storage if vboot
does not update the cache itself.

Update read_vbnv to return a value depending upon whether it wants a
write-back to be performed when save is called.
Return value:
0 = No write-back required
1 = Write-back of VBNV cache is required.

Change-Id: I239939d5f9731d89a9d53fe662321b93fc1ab113
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15457
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/357665
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
2016-06-30 10:08:25 -07:00
..
acpi
arch UPSTREAM: riscv/bootblock.S: Register machine-mode, not supervisor-mode trap handler 2016-06-29 21:31:51 -07:00
commonlib UPSTREAM: region: Add writeat and eraseat support 2016-06-27 17:13:18 -07:00
console UPSTREAM: console/post: be explicit about conditional cmos_post_log() compiling 2016-05-26 03:21:57 -07:00
cpu UPSTREAM: AMD k8 fam10: Refactor S3 recovery 2016-06-30 10:08:23 -07:00
device UPSTREAM: device: i2c: Add support for I2C bus operations 2016-06-10 00:17:46 -07:00
drivers UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
ec google/chromeec: Update EC command header 2016-06-23 15:15:09 -07:00
include UPSTREAM: soc/intel/common: Add prototype for global_reset() reset 2016-06-27 17:13:01 -07:00
lib UPSTREAM: region: Add writeat and eraseat support 2016-06-27 17:13:18 -07:00
mainboard UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
northbridge UPSTREAM: intel/i945: Use common ACPI S3 recovery 2016-06-27 17:13:22 -07:00
soc UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
southbridge UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
superio UPSTREAM: sio/winbond/w83667hg-a: Add pinmux defines for UART B 2016-05-31 12:07:04 -07:00
vendorcode UPSTREAM: vbnv: Do not silently reset cache in read_vbnv 2016-06-30 10:08:25 -07:00
Kconfig kconfig: allow various tpm type and interface permutations 2016-06-15 15:29:06 -07:00