coreboot/src/soc/intel
Aamir Bohra 2973d1e478 vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155
This CL implements below changes:

1) Update FSP-M and FSP-S header files as per FSP release version 1155.
2) Update the PcdSerialIoUartNumber reference in fsp_params.c with
   SerialIoUartDebugControllerNumber.

Change-Id: I6d412424f9f5c5d2d56b789c2fef4bdb817a3019
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32844
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-12 22:48:36 +00:00
..
apollolake src/soc/intel/common/smbios: Add addtional infos to dimm_info 2019-06-06 11:32:52 +00:00
baytrail soc/intel/baytrail: set default VBIOS filename and PCI ID 2019-06-02 22:26:34 +00:00
braswell {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support 2019-06-12 07:47:13 +00:00
broadwell src/soc/intel: Avoid NULL pointer dereference 2019-06-03 18:24:06 +00:00
cannonlake vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155 2019-06-12 22:48:36 +00:00
common soc/intel/common: Skip SoC GT programming based on CONFIG_SKIP_GRAPHICS_ENABLING 2019-06-09 02:46:37 +00:00
denverton_ns soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE 2019-05-29 20:24:13 +00:00
fsp_baytrail soc/intel/fsp_baytrail/romstage: Remove variable set but not used 2019-05-23 08:58:33 +00:00
fsp_broadwell_de soc/intel/fsp_broadwell_de/romstage: Remove variable set but not used 2019-05-23 08:58:15 +00:00
icelake soc/intel/icelake: Pass FSP-M/S UPD as per ICL requirement 2019-06-09 02:47:17 +00:00
quark soc/intel/quark: Don't use CAR_GLOBAL 2019-05-29 20:05:06 +00:00
skylake src/soc/intel/skylake/acpi: Remove Return for PS0/3 2019-06-08 11:23:55 +00:00
Kconfig src/cpu: Remove dead sourced lines 2018-11-15 10:25:20 +00:00