coreboot/src
Edward O'Callaghan d743e0daf3 mainboard/lenovo/g505s/Kconfig: Remove HUDSON_LEGACY_FREE
The Embedded Controller sits behind the LPC bridge and so needs
LPC decodes to be enabled.

Remove the LPC decode enable out of agesawrapper.c. The enable
is in fact done in: 'VOID FchInitResetLpcProgram(IN VOID *FchDataPtr)'
which writes the magic '0xFF03FFD5' to register 0x44 of the PCI 14.3
LPC Bridge to enable LPC decodes when HUDSON_LEGACY_FREE is not defined.

Change-Id: I0b4e99cc0d6f89f0261f26ee61b8c175a373c730
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7625
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
2014-12-03 12:03:54 +01:00
..
arch Replace hlt with halt() 2014-12-02 10:25:55 +01:00
console Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00
cpu AGESA: Trace execution with AGESA_EVENTLOG() 2014-12-03 08:11:03 +01:00
device device/dram/ddr3.c: Fix sizeof on array func param overflow 2014-11-08 07:09:34 +01:00
drivers SPI: Add vendor Atmel 2014-12-03 05:29:04 +01:00
ec Replace hlt with halt() 2014-12-02 10:25:55 +01:00
include Replace hlt() loops with halt() 2014-11-30 12:20:07 +01:00
lib gcc.c: Test for gcc, not for non-clang 2014-11-30 12:20:37 +01:00
mainboard mainboard/lenovo/g505s/Kconfig: Remove HUDSON_LEGACY_FREE 2014-12-03 12:03:54 +01:00
northbridge AGESA: Trace execution with AGESA_EVENTLOG() 2014-12-03 08:11:03 +01:00
soc Replace hlt with halt() 2014-12-02 10:25:55 +01:00
southbridge AGESA fam15tn / fam15rl / fam16kb: Common agesawrapper 2014-12-03 08:08:39 +01:00
superio Mark non-executable files non-executable 2014-12-01 17:33:07 +01:00
vendorcode Mark non-executable files non-executable 2014-12-01 17:33:07 +01:00
Kconfig Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00