Julien Viard de Galbert 2912e8e5dc soc/intel/denverton_ns: Enable common block PMC ... Mainly update headers to build. Added option PMC_GLOBAL_RESET_ENABLE_LOCK to remove function configuring the global reset through PMC base. On denverton the global reset lock is not in PMC base but in the PCI registers so this code cannot be shared. Change-Id: I9ace70862cab63f8355252d034292596c7eab1fd Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/25426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Evandro Luiz Hauenstein <kingsumos@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>		2018-09-14 14:11:03 +00:00
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amd	soc/amd/stoneyridge: Fix more GPIO functions	2018-09-12 11:54:09 +00:00
broadcom	soc/broadcom/cygnus: Increase romstage SRAM size in memlayout	2018-08-13 12:16:32 +00:00
cavium	soc/cn81xx: Add vboot support	2018-08-24 12:29:28 +00:00
imgtec	soc/imgtec/pistachio: Get rid of device_t	2018-06-04 09:18:19 +00:00
intel	soc/intel/denverton_ns: Enable common block PMC	2018-09-14 14:11:03 +00:00
lowrisc	arch/riscv: provide a monotonic timer	2018-09-14 09:28:06 +00:00
mediatek	mediatek: Refactor memory test code among similar SoCs	2018-09-06 10:29:39 +00:00
nvidia	complier.h: add __always_inline and use it in code base	2018-09-14 08:16:37 +00:00
qualcomm	drivers/i2c: Add i2c TPM support for different stages	2018-08-10 23:25:52 +00:00
rockchip	drivers/i2c: Add i2c TPM support for different stages	2018-08-10 23:25:52 +00:00
samsung	src: Fix typo	2018-08-10 21:25:53 +00:00
sifive	soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation	2018-09-14 10:41:49 +00:00
ucb	arch/riscv: provide a monotonic timer	2018-09-14 09:28:06 +00:00