Benjamin Doron 2875df1c9e soc/intel/skylake/acpi.c: Name devices on secondary bus ... Naming a device allows an ACPI _ROM method to be written for it. GPUs may require this to make the configuration data contained within available to an OS driver. This may be required for GPUs that do not contain their vBIOS, or perhaps the drivers require it in this form/fashion. Working on an Acer Aspire VN7-572G (Skylake-U). nouveau successfully obtains the vBIOS via ACPI (kernel 5.7.11). Change-Id: Ida87aebf8fdf341ab350c2bb3704d2ef695cf8f0 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43074 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>		2020-08-17 07:12:46 +00:00
..
acpi	src/acpi: Add missing <{stdbool,stdint}.h>	2020-07-29 09:37:10 +00:00
arch	arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dram	2020-08-17 06:22:41 +00:00
commonlib	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
console	console: Update for vboot before bootblock	2020-06-15 22:07:12 +00:00
cpu	cpu/Makefile.inc: Clean up non-existing directory inclusion	2020-08-17 06:24:23 +00:00
device	{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences	2020-08-17 06:58:45 +00:00
drivers	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
ec	ec/google/chromeec: Add helper to request AP reset	2020-08-14 08:35:15 +00:00
include	soc/intel/common: Move common HDA registers to <device/azalia_device.h>	2020-08-17 06:44:04 +00:00
lib	lib/imd_cbmem.c: Add a helper function to indicate that cbmem is ready	2020-08-17 06:22:58 +00:00
mainboard	mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled	2020-08-17 07:11:02 +00:00
northbridge	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
security	security/vboot/Makefile.inc: Update regions-for-file function	2020-08-13 05:43:53 +00:00
soc	soc/intel/skylake/acpi.c: Name devices on secondary bus	2020-08-17 07:12:46 +00:00
southbridge	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
superio	superio/ite/it8728f: Correct Kconfig selections	2020-08-14 00:51:37 +00:00
vendorcode	vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controller	2020-08-17 06:21:43 +00:00
Kconfig	arch/x86: Remove RELOCATABLE_RAMSTAGE	2020-07-06 06:17:47 +00:00