coreboot/src/soc
Raul E Rangel 27b6b0ed72 soc/amd/picasso/acpi: Remove hardcoded FCH IRQ numbers
Modify the FCH ACPI devices to query the PCI IRQ mapping registers for
their current IRQ numbers.

BUG=b:139429446, b:154756391
TEST=Boot trembyle and see that I2C and UART devices are finally
functional.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I8f2035f74240ead4089ff4d503dfbeb447cf8de4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-06-03 12:15:46 +00:00
..
amd soc/amd/picasso/acpi: Remove hardcoded FCH IRQ numbers 2020-06-03 12:15:46 +00:00
cavium src: Remove redundant includes 2020-06-02 07:42:32 +00:00
intel soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS 2020-06-03 01:30:59 +00:00
mediatek src: Remove redundant includes 2020-06-02 07:42:32 +00:00
nvidia src: Remove redundant includes 2020-06-02 07:42:32 +00:00
qualcomm src: Remove unused '#include <timer.h>' 2020-06-02 07:39:05 +00:00
rockchip src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
samsung samsung/exynos5420: add resources during read_resources() 2020-05-14 21:27:34 +00:00
sifive soc/sifive/fu540: Add chip_operations stub 2020-05-28 09:30:51 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00