Dtrain Hsu 1659218d7c mb/google/nissa/var/uldren: Modify GPP_D7 and PCIE RP7 ... Uldren does not have PCIE device and should disable PCIE RP7 and GPP_D7 for preventing PCIe controller not power gate in S0ix. BUG=b:283735051 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage 1. PCIE RP7: cbmem -c | grep 'PCI: 00:1c.6' [SPEW ] PCI: 00:1c.6: enabled 0 [SPEW ] PCI: 00:1c.6: enabled 0 2. GPP_D7: iotools mmio_read32 0xfd6d0ab0 0x44000300 Change-Id: Ia8a2c0f5530c7a056e8d706c651cac1d49b2091c Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75644 Reviewed-by: Harsha B R <harsha.b.r@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com>		2023-06-06 12:18:49 +00:00
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acpi	mb/google/brya/acpi: FBVDD_PWR_EN should be inverted on Agah	2023-05-31 18:47:23 +00:00
spd
variants	mb/google/nissa/var/uldren: Modify GPP_D7 and PCIE RP7	2023-06-06 12:18:49 +00:00
board_info.txt
bootblock.c
chromeos-nissa-16MiB-debugfsp.fmd
chromeos-nissa-16MiB.fmd
chromeos-nissa-32MiB.fmd
chromeos-serger.fmd
chromeos.c
chromeos.fmd
dsdt.asl
ec.c
Kconfig	mb/google/hades: Correct TPM I2C bus to 3	2023-05-14 03:25:55 +00:00
Kconfig.name	mb/google/brya/var/kuldax: use RPL FSP headers	2023-06-04 19:14:01 +00:00
mainboard.c
Makefile.inc	mb/google/brya: Split gma-mainboards for different baseboards	2023-05-08 13:13:06 +00:00
romstage.c
smihandler.c
wwan_power.asl