coreboot/src/northbridge
Aaron Durbin 264bf0b27e cpu/x86/mtrr: move cache_ramstage() to its only user
The Intel i3100 northbridge code is the only user of
cache_ramstage(). Therefore, place it next to the sole
consumer.

Change-Id: If15fb8d84f98dce7f4de9e089ec33035622d8f74
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14097
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-03-16 18:55:51 +01:00
..
amd nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training 2016-03-13 23:42:41 +01:00
dmp/vortex86ex tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel cpu/x86/mtrr: move cache_ramstage() to its only user 2016-03-16 18:55:51 +01:00
rdc/r8610 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
via drivers/pc80: Add PS/2 mouse presence detect 2016-02-01 22:10:46 +01:00