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coreboot/src/cpu/x86
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Aaron Durbin 264bf0b27e cpu/x86/mtrr: move cache_ramstage() to its only user 
The Intel i3100 northbridge code is the only user of
cache_ramstage(). Therefore, place it next to the sole
consumer.

Change-Id: If15fb8d84f98dce7f4de9e089ec33035622d8f74
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14097
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-03-16 18:55:51 +01:00
..
16bit arch/x86: rename reset_vector -> _start 2016-03-04 01:16:05 +01:00
32bit arch/x86: always use _start as entry symbol for all stages 2016-03-04 04:49:46 +01:00
cache
lapic */Makefile.inc: Compile files needed by uart8250 in x86 bootblock 2016-01-21 05:37:48 +01:00
mtrr cpu/x86/mtrr: move cache_ramstage() to its only user 2016-03-16 18:55:51 +01:00
name tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
pae
smm Move object files to $(obj)/<class>/ 2016-01-28 00:31:32 +01:00
tsc cpu/x86/tsc: Compile delay_tsc.c for the bootblock as well 2016-02-11 19:21:24 +01:00
car.c arch/x86: document CAR symbols and expose them in symbols.h 2016-03-05 16:00:42 +01:00
fpu_enable.inc tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
Kconfig cpu/x86: Sort some Kconfig options 2016-03-08 16:31:19 +01:00
Makefile.inc Move object files to $(obj)/<class>/ 2016-01-28 00:31:32 +01:00
mirror_payload.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
mp_init.c cpu: Fix typo that spelled "allocate" as "allocte." 2016-01-20 16:07:49 +01:00
sipi_vector.S tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
sse_enable.inc tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00