Kangheui Won 260f0f93ef cezanne/psp_verstage: add reset/timer svc ... The new cezanne PSP release added support for these svcs. So add those functionality back to cezanne psp_verstage. BUG=b:187906425 Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Id542f5ed0762f582ea966466d67ed938ecb9c1f0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2021-06-07 05:16:20 +00:00
..
agesa	src: Drop "This file is part of the coreboot project" lines	2021-05-10 15:07:33 +00:00
cimx	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
fsp	cezanne/psp_verstage: add reset/timer svc	2021-06-07 05:16:20 +00:00
include
pi	vc/amd/pi/00630F01: Remove unused directory and code	2021-05-26 22:42:35 +00:00
Kconfig
Makefile.inc