coreboot/src
Eric Lai 25eb1b3149 mb/google/drallion: Clean up unused weak function
Drallion only supports on board dimm. Remove the spd read from
SMBus. Since CB:37678 remove the Wilco 1.0 CML variants, weak function
is not needed.

BUG=b:140068267
TEST=boot into OS without issue
BRANCH=none

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I662f87ccf48ba470998fa28fb14c9985673cb37d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37780
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-19 17:48:00 +00:00
..
acpi
arch src: Remove unused 'include <arch/cpu.h>' 2019-12-19 05:58:50 +00:00
commonlib Drop ROMCC code and header guards 2019-12-19 03:25:05 +00:00
console arch/x86: Drop uses of ROMCC_BOOTBLOCK 2019-12-19 03:26:27 +00:00
cpu src: Remove unused 'include <arch/cpu.h>' 2019-12-19 05:58:50 +00:00
device src/{drivers,device,ec}: Remove unused <stdlib.h> 2019-12-19 05:25:56 +00:00
drivers src: Remove unused 'include <arch/cpu.h>' 2019-12-19 05:58:50 +00:00
ec src/{drivers,device,ec}: Remove unused <stdlib.h> 2019-12-19 05:25:56 +00:00
include src: Use '#include <smp/node.h>' when appropriate 2019-12-19 05:23:25 +00:00
lib fmap: Make FMAP_CACHE mandatory if it is configured in 2019-12-11 11:42:26 +00:00
mainboard mb/google/drallion: Clean up unused weak function 2019-12-19 17:48:00 +00:00
northbridge src/northbridge: Remove unused <stdlib.h> 2019-12-19 05:33:02 +00:00
security src/security: Remove unused <stdlib.h> 2019-12-19 05:24:07 +00:00
soc src: Remove unused 'include <arch/cpu.h>' 2019-12-19 05:58:50 +00:00
southbridge src: Remove unused 'include <arch/cpu.h>' 2019-12-19 05:58:50 +00:00
superio superio/aspeed/ast2400: Add AST2500 support 2019-12-17 13:05:49 +00:00
vendorcode Drop ROMCC code and header guards 2019-12-19 03:25:05 +00:00
Kconfig Kconfig: Drop NO_RELOCATABLE_RAMSTAGE 2019-12-09 17:02:16 +00:00