coreboot/src
Yidi Lin 24ea3f3364 soc/mediatek/mt8195: Add a stub implementation of the MT8195 SoC
TEST=boot from SPI-NOR and show console message at bootblock stage.

Change-Id: Ia93430006096b7410393ab31fee4ea40598d0b34
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52258
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-04-13 06:07:54 +00:00
..
acpi ACPI: Add SATC structure for DMAR table 2021-03-28 16:03:21 +00:00
arch arch/x86: Provide readXp/writeXp helpers in arch/mmio.h 2021-04-06 07:10:40 +00:00
commonlib cbfs: mcache: Fix size calculation for perfectly full cache 2021-04-10 00:00:34 +00:00
console console/vtxprintf.c: Add missing <types.h> 2021-02-16 08:15:26 +00:00
cpu cpu/intel/haswell: Use new fixed BAR accessors 2021-04-10 16:04:59 +00:00
device device/i2c_bus.c: Correct code style 2021-04-06 07:02:47 +00:00
drivers drivers/tpm/Kconfig: Rename TPM_INIT to TPM_INIT_RAMSTAGE 2021-04-09 06:21:35 +00:00
ec chromeec: make ssfc optional in fw_config 2021-04-12 17:11:40 +00:00
include spd.h: Move DIMMx macros to i440bx/raminit.h 2021-04-11 21:05:00 +00:00
lib decompressor: Add CBFS_VERIFICATION support 2021-04-06 07:49:15 +00:00
mainboard mb/google/mancomb: Temporary fix to set eSPI mux 2021-04-12 17:26:52 +00:00
northbridge nb/intel/x4x: Refactor sync DLL programming (part 2) 2021-04-12 20:42:08 +00:00
security verstage: Add debug print when returning from verstage 2021-04-06 07:49:43 +00:00
soc soc/mediatek/mt8195: Add a stub implementation of the MT8195 SoC 2021-04-13 06:07:54 +00:00
southbridge sb/amd/pi/hudson: remove unused Bolton PI FCH code 2021-04-11 21:06:29 +00:00
superio acpi/acpigen.h: Add more intuitive AML package closing functions 2021-03-22 11:21:55 +00:00
vendorcode vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v4043 2021-04-10 00:55:13 +00:00
Kconfig southbridge: Ensure common Kconfig gets included last 2021-02-18 10:11:39 +00:00