Marc Jones 030b5bb7c3 soc/amd/stoneyridge: Set up LAPIC ... LAPIC setup is required to set virtualwire mode for legacy interrupts. This was omitted when stoneyridge was changed to use the common mp_init. BUG=b:72351388 TEST=Verify keyboard now works in SeaBIOS Change-Id: I648d8b5b5a3744a5781446c7cb72934a071f9a72 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/23718 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2018-02-14 16:16:47 +00:00
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amd	soc/amd/stoneyridge: Set up LAPIC	2018-02-14 16:16:47 +00:00
broadcom	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
dmp	DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT	2018-01-15 23:23:17 +00:00
imgtec	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
intel	soc/intel/cannonlake: Add Pch iSCLK programming	2018-02-11 00:00:41 +00:00
lowrisc	RISC-V boards: Stop using the config string	2017-11-07 12:31:00 +00:00
marvell	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
mediatek	soc/mediatek/mt8173: Remove cast of NULL* to void *	2017-11-03 16:03:30 +00:00
nvidia	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
qualcomm	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
rockchip	rockchip/rk3399: Pass coreboot table pointer to ARM TF	2018-02-02 22:19:26 +00:00
samsung	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
ucb	riscv: Remove config string support	2017-12-02 05:25:00 +00:00