coreboot/src
Duncan Laurie 215f278563 ELOG: Support for non-memory mapped flash
If the event log is stored in flash that is not memory
mapped then it must use the SPI controller to read from
the flash device instead of relying on memory accesses.

In addition a new CBMEM ID is added to keep an resident
copy of the ELOG around if needed.  The use of CBMEM for
this is guarded by a new CONFIG_ELOG_CBMEM config option.
This CBMEM buffer is created and filled late in the process
when the SMBIOS table is being created because CBMEM is
not functional when ELOG is first initialized.

The downside to using CBMEM is that events added via the
SMI handler at runtime are not reflected in the CBMEM copy
because I don't want to let the SMM handler write to memory
outside the TSEG region.

In reality the only time we add runtime events is at kernel
shutdown so the impact is limited.

Test:
1) Test with CONFIG_ELOG_CBMEM enabled to ensure the event
log is operational and SMBIOS points to address in CBMEM.
The test should involve at least on reboot to ensure that the
kernel is able to write events as well.

> mosys -l smbios info log | grep ^address
address              | 0xacedd000

> mosys eventlog list
0 | 2012-10-10 14:02:46 | Log area cleared | 4096
1 | 2012-10-10 14:02:46 | System boot | 478
2 | 2012-10-10 14:02:46 | System Reset
3 | 2012-10-10 14:03:33 | Kernel Event | Clean Shutdown
4 | 2012-10-10 14:03:34 | System boot | 479
5 | 2012-10-10 14:03:34 | System Reset

2) Test with CONFIG_ELOG_CBMEM disabled to ensure the event
log is operational and SMBIOS points to memory mapped flash.
The test should involve at least on reboot to ensure that the
kernel is able to write events as well.

> mosys -l smbios info log | grep ^address
address              | 0xffbf0000

> mosys eventlog list
0 | 2012-10-10 14:33:17 | Log area cleared | 4096
1 | 2012-10-10 14:33:18 | System boot | 480
2 | 2012-10-10 14:33:18 | System Reset
3 | 2012-10-10 14:33:35 | Kernel Event | Clean Shutdown
4 | 2012-10-10 14:33:36 | System boot | 481
5 | 2012-10-10 14:33:36 | System Reset

Change-Id: I87755d5291ce209c1e647792227c433dc966615d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1776
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12 17:09:39 +01:00
..
arch/x86 oprom: Ensure that mode information is valid before putting it in the tables. 2012-11-12 04:22:34 +01:00
boot Add POST code for "All devices initialized" 2012-11-07 03:57:34 +01:00
console Log unexpected post code from the previous boot 2012-11-08 19:40:58 +01:00
cpu Fix gcc-4.7 building problem. 2012-11-12 07:39:31 +01:00
devices oprom: Ensure that mode information is valid before putting it in the tables. 2012-11-12 04:22:34 +01:00
drivers ELOG: Support for non-memory mapped flash 2012-11-12 17:09:39 +01:00
ec Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
include ELOG: Support for non-memory mapped flash 2012-11-12 17:09:39 +01:00
lib USBDEBUG: retry harder for slow devices 2012-07-30 20:54:24 +02:00
mainboard ACPI: Zero pstate/cstate control values in FADT 2012-11-12 03:34:03 +01:00
northbridge Make coreboot use the offset parameter in cbfstool create 2012-11-09 19:07:34 +01:00
southbridge SPI: Fix and enable Fast Read support 2012-11-12 17:09:21 +01:00
superio smsc/lpc47n227: Make early_serial usable 2012-11-06 21:53:48 +01:00
vendorcode Change flashmap base to reflect new FMAP in U-boot 2012-11-09 19:00:49 +01:00
Kconfig Update SeaBIOS stable to the release-1.7.1 commit 2012-10-16 03:31:05 +02:00
Kconfig.deprecated_options Unify ID_SECTION_OFFSET and mark it deprecated 2012-01-18 11:21:39 +01:00