coreboot/src
Subrata Banik 205f30bdfc soc/intel/cmn/graphics: Implement API for IGD to join the MBUS
This patch implements `.final` hooks for the IGD device to perform the
required operations before handing the control to the payload or OS.

The MBUS (Memory Bus) is a high-speed interface that connects the
graphics controller to the system memory. It provides a dedicated data
path for graphics data, which helps to improve graphics performance.

The MBUS is a key technology that helps to make the Intel i915 driver
powerful and versatile graphics drivers available. It provides the
high-speed data transfer capabilities that are essential for smooth
and responsive graphics performance.

Enable this config to ensure that the Intel GFX controller joins the
MBUS before the i915 driver is loaded. This is necessary to prevent
the i915 driver from re-initializing the display if the firmware has
already initialized it. Without this config, the i915 driver will
initialize the display to bring up the login screen although the
firmware has initialized the display using the GFX MMIO registers and
framebuffer.

Kernel graphics driver can avoid redundant display init by firmware,
which can optimize boot time by ~15ms-30ms.

Ensures hashing mode is 1x4 to enable a single pipe between Pipe A or B.
Typically, internal display is on Pipe-A, so 1x4 restricts MBUS joining
to internal display alone.

BUG=b:284799726
TEST=Able to build and boot google/rex

Change-Id: I60ae76dc783383e027e66edbcdeeb535472caeb1
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78385
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-18 05:47:18 +00:00
..
acpi acpi/acpigen: Allow general namestring in write mutex functions 2023-10-16 07:59:21 +00:00
arch arch/x86/cpu_common: Add cpu_get_c_substate_support 2023-10-06 12:15:34 +00:00
commonlib cbfs: Restore 32-bit padding in cbfs_header 2023-10-06 10:11:31 +00:00
console commonlib,console,nb,sb,security: Add SPDX licenses to Makefiles 2023-08-14 15:14:45 +00:00
cpu Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
device arch to drivers/intel: Fix misspellings & capitalization issues 2023-09-08 00:53:57 +00:00
drivers spi/winbond: Use spi_flash_bpbits in winbond_bpbits_to_region 2023-10-05 12:57:51 +00:00
ec ec/google/chromeec: Add is_battery_present_and_above_critical_threshold 2023-10-16 03:41:29 +00:00
include include/stddef: define SIZE_MAX 2023-10-10 06:43:37 +00:00
lib cbfs: Remove x86 .data section limitation comment 2023-09-18 13:19:51 +00:00
mainboard mb/google/rex: enable WIFI_SAR for all variants 2023-10-18 05:46:54 +00:00
northbridge Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
sbom
security security/tpm: Enable Hibernate on setup failure 2023-10-02 17:06:32 +00:00
soc soc/intel/cmn/graphics: Implement API for IGD to join the MBUS 2023-10-18 05:47:18 +00:00
southbridge sb/intel/bd82x6x/pcie: Drop register write 2023-10-12 12:41:17 +00:00
superio superio/smsc/sch5545/acpi/superio.asl: Fix UART2 device name 2023-10-16 09:44:49 +00:00
vendorcode treewide: convert to tpm_result_t 2023-09-28 16:54:37 +00:00
Kconfig Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00