Hung-Te Lin 20316321fb armv7: Allow accessing ACTLR (Auxiliary Control Register) ... The ACTLR provides implementation defined configuration and control options for the processor. Change-Id: I74df1ed7887eb3f16a1b8297db998ec2f8b18311 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65107 Commit-Queue: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/4447 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>		2013-12-21 22:46:09 +01:00
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arch	armv7: Allow accessing ACTLR (Auxiliary Control Register)	2013-12-21 22:46:09 +01:00
console	snprintf: lockless operation	2013-12-07 19:27:53 +01:00
cpu	exynos5420: re-factor the SDMMC GPIO config routines	2013-12-21 22:46:05 +01:00
device	Add Kconfig options to override Subsystem Vendor and Device ID	2013-12-21 12:02:40 +01:00
drivers	max77802: update header	2013-12-21 13:29:42 +01:00
ec	chromeec: Add event methods for EC requested throttle	2013-12-21 12:02:14 +01:00
include	Add a specific post code for S3 resume failures	2013-12-21 12:02:43 +01:00
lib	Pit: graphics	2013-12-21 22:45:06 +01:00
mainboard	snow: Set up the i2s0 pins during boot	2013-12-21 22:45:37 +01:00
northbridge	haswell: add option to change DqPinsInterleaved	2013-12-21 12:02:56 +01:00
southbridge	lynxpoint: Add configuration option for SATA gen3 DTLE registers	2013-12-21 12:03:00 +01:00
superio	Correct file permissions.	2013-12-07 00:39:09 +01:00
vendorcode	chromeos: Check for recovery reason code in shared data	2013-12-21 07:28:37 +01:00
Kconfig	Add GRUB2 payload to build system	2013-11-19 01:07:25 +01:00