coreboot/src/superio/smsc
Michał Żygowski 5aba2aeead superio/smsc/sch5545: Disable PS/2 lines isolation during init
Disable PS/2 data and clock isolation in order to properly initialize
the PS/2 keyboard and mouse in payload/OS. These bits are set by OS via
ACPI and can survive S5 state. It is necessary to clear them after an
ungraceful shutdown in order to perform PS/2 controller initialization
e.g. in SeaBIOS.

TEST=PS/2 keyboard can always be successfully initialized in SeaBIOS
on Dell OptiPlex 9010

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Iac6be095c996b357b5d4e8d75199f94a89bf73e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59673
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-27 14:23:08 +00:00
..
fdc37n972
kbc1100
lpc47m10x
lpc47m15x
lpc47n207
lpc47n217
lpc47n227
mec1308
sch5147/acpi
sch5545 superio/smsc/sch5545: Disable PS/2 lines isolation during init 2021-11-27 14:23:08 +00:00
sio10n268
sio1007
sio1036
smscsuperio
Makefile.inc