coreboot/src/soc/intel
Duncan Laurie 1f52f51f4e baytrail: Add function to read top of low memory
The top of low memory is also the start of the region where
PCIe resources are allocated.  This needs to be passed in
ACPI but is only readable from IOSF.

BUG=chrome-os-partner:23505
BRANCH=rambi
TEST=build and boot on rambi

Change-Id: Iad95335f72dc3e35b837bedb8d52d388c861a330
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175625
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4935
Tested-by: build bot (Jenkins)
2014-04-30 23:11:21 +02:00
..
baytrail baytrail: Add function to read top of low memory 2014-04-30 23:11:21 +02:00
Kconfig baytrail: add initial support 2014-01-31 16:36:59 +01:00
Makefile.inc baytrail: add initial support 2014-01-31 16:36:59 +01:00