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coreboot/src/northbridge
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Steven Sherk 1cbabb00d9 Add MMCONF resource to AMD fam15tn PCI_DOMAIN 
In the process of verifying change it was discovered the MMCONF
default base address 0xA0000000 was set below mem_top 0xE0000000
and bus number 256 wasn't a relistic number. The Kconfig defaults were
changed to mirror fam15 defaults base address 0xF8000000 and bus
number 64. Verified changes with boot to OS.

This is a port of the following:
commit d5c998be99

	The coreboot resource allocator doesn't respect resources
	claimed in the APIC_CLUSTER. Move the MMCONF resource to the
	PCI_DOMAIN to prevent overlap with PCI devices.

original-Change-Id: I8541795f69bbdd9041b390103fb901d37e07eeb9
    Signed-off-by: Marc Jones <marc.jones@se-eng.com
    URL - http://review.coreboot.org/#/c/2167/

Change-Id: I47660061538f8889f528b9b880a82645074886a7
Signed-off-by: Steven Sherk <steven.sherk@se-eng.com>
Reviewed-on: http://review.coreboot.org/2260
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2013-02-04 18:14:35 +01:00
..
amd Add MMCONF resource to AMD fam15tn PCI_DOMAIN 2013-02-04 18:14:35 +01:00
intel Extend CBFS to support arbitrary ROM source media. 2013-01-30 17:58:32 +01:00
rdc Remove assembly coded log2 function 2012-11-28 07:57:17 +01:00
via Rename devices -> device 2012-11-30 23:59:58 +01:00
Kconfig Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00
Makefile.inc Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00