coreboot/src/southbridge
Arne Georg Gleditsch e7a5b76a74 Move initialization of MMCONF BAR to cache_as_ram setup phase, in order
to make sure MMCONF is set up before use.  Otherwise, PCI config
accesses run before init_cpus() will be lost if MMCONF is enabled
(unless explicitly done as port-based accesses).

This obsoletes removal of RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78) in
mcp55_early_setup, so reinsert.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-13 15:11:35 +00:00
..
amd Print an error and correct pci scan limits. Skip sb700 ISA DMA init if needed. 2010-09-13 14:43:02 +00:00
broadcom Fix all warnings in the tree 2010-07-08 16:41:05 +00:00
intel Remove warnings from USB debug console code. 2010-08-04 19:29:11 +00:00
nvidia Move initialization of MMCONF BAR to cache_as_ram setup phase, in order 2010-09-13 15:11:35 +00:00
ricoh Remove the rest of cardbus_scan_bus. 2010-06-07 17:12:57 +00:00
sis Remove warnings from USB debug console code. 2010-08-04 19:29:11 +00:00
ti Fix some of Peter's suggestions for the Nokia IP530. 2010-06-07 20:15:54 +00:00
via Code must not access the smbus registers before the RTC power well is 2010-09-08 11:00:25 +00:00
Kconfig Whatever happened here,... The DEC Tulip is a network card, no bridge of any 2010-08-17 09:52:01 +00:00
Makefile.inc Whatever happened here,... The DEC Tulip is a network card, no bridge of any 2010-08-17 09:52:01 +00:00