Stefan Reinauer 1babddb202 rework RTC driver output to make it more consistent. ... Also add a meaningful define (Not hooked up in Kconfig, that might or might not follow) Change-Id: I9cc4bca0d23d75e6a1d767932ec62e8c68b39d71 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/278 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>		2011-10-17 17:51:40 +02:00
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arch/x86	cbfs_and_run_core() is not part of the API, make it static.	2011-10-15 12:27:52 +02:00
boot	use byteorder.h instead of implementing another byte swap function	2011-10-15 16:21:06 +02:00
console	Add support for the tracing infastructure in coreboot.	2011-09-07 01:26:47 +02:00
cpu	Fixes several issues with amd k8 SSDT P-state generation	2011-10-17 09:30:25 +02:00
devices	Fix compilation of x86emu with gcc 4.6.x	2011-10-13 20:01:47 +02:00
drivers	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
ec	Lenovo H8: Always clear audio mute	2011-08-19 14:17:06 +02:00
include	Enable/fix compilation of i8254 code in ram stage.	2011-10-13 20:00:22 +02:00
lib	refactor vesa mode setting code and bootsplash code	2011-10-13 20:00:50 +02:00
mainboard	Re-worked devicetree.cb for DL145 G1	2011-10-17 09:44:56 +02:00
northbridge	AMD CPU and chipset fixes for compilation with gcc 4.6	2011-10-15 13:40:17 +02:00
pc80	rework RTC driver output to make it more consistent.	2011-10-17 17:51:40 +02:00
southbridge	AMD CPU and chipset fixes for compilation with gcc 4.6	2011-10-15 13:40:17 +02:00
superio	w83627hf: ASL include containing virtual device tree of the SuperIO	2011-10-12 07:56:29 +02:00
vendorcode	Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6	2011-10-14 22:57:11 +02:00
Kconfig	refactor vesa mode setting code and bootsplash code	2011-10-13 20:00:50 +02:00
Kconfig.deprecated_options	some ifdef --> if fixes	2011-04-21 20:24:43 +00:00