coreboot/src/arch/riscv/include
Jonathan Neuschäfer 1b1d4b7ae6 arch/riscv: Enable unaligned load handling
Change-Id: If1c63971335a6e2963e01352acfa4bd0c1d86bc2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15590
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-19 20:22:25 +02:00
..
arch arch/riscv: Enable unaligned load handling 2016-07-19 20:22:25 +02:00
atomic.h arch/riscv: Add missing license headers 2016-01-18 02:14:03 +01:00
bits.h riscv-trap-handling: Add preliminary trap handling for riscv 2015-08-26 23:50:45 +00:00
spike_util.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
stdint.h arch/riscv: Add missing license headers 2016-01-18 02:14:03 +01:00
vm.h arch/riscv: Remove enter_supervisor 2016-07-18 22:51:13 +02:00