Sridhar Siricilla 1a2b702848 soc/intel/common: Move CSE Lite driver functionality into romstage ... The patch sets up the CSE Lite driver in the romstage instead of ramstage. With this change, CSE Lite driver sets CSE's boot partition and triggers CSE FW update in the romstage. The cse_fw_sync() must be called after DRAM initialization as HMRFPO_ENABLE HECI command (which is used by cse_fw_sync()) is expected to be executed after DRAM initialization. With this change, it improves the cold boot time by ~154ms. Test=Verified on JSL and TGL platforms BUG=b:174694480 Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I2fd562a5c6c8501226abbcb68021d9356bcf0b73 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48279 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-12-14 18:42:12 +00:00
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alderlake	soc/intel/alderlake: Drop unreferenced devicetree settings	2020-12-14 08:18:06 +00:00
apollolake
baytrail
braswell	soc/intel/braswell: Use Kconfig value for TSEG size	2020-12-14 11:06:33 +00:00
broadwell
cannonlake	soc/intel/cannonlake: Drop unreferenced devicetree settings	2020-12-14 08:18:14 +00:00
common	soc/intel/common: Move CSE Lite driver functionality into romstage	2020-12-14 18:42:12 +00:00
denverton_ns
elkhartlake	soc/intel/elkhartlake: Drop unreferenced devicetree settings	2020-12-14 08:18:22 +00:00
icelake	soc/intel/icelake: Drop unreferenced devicetree settings	2020-12-14 08:18:30 +00:00
jasperlake	soc/intel/jasperlake: Drop unreferenced devicetree settings	2020-12-14 08:18:52 +00:00
quark
skylake	soc/intel/skylake: Drop always-zero ProbelessTrace dt setting	2020-12-14 10:40:51 +00:00
tigerlake	soc/intel/tigerlake: Drop unreferenced devicetree settings	2020-12-14 08:19:01 +00:00
xeon_sp	soc/intel/xeon_sp/skx: Hook up microcode blob	2020-12-14 10:38:34 +00:00
Kconfig